With the rapid development of the electronics industry in recent years there has been phenomenal growth in the need for integrated circuits. As such there has been a significant focus world-wide on improving methods of manufacture of integrated circuits with a view to increasing production speed/efficiency. In general integrated circuits may be formed on a number of materials but they are typically formed on silicon wafers. The process of manufacture of integrated circuits of this type typically involves the sequential deposition of a number of layers of conductive, semi-conductive or insulating layers onto the outer surface of a wafer. Using the process a number of layers are built up sequentially with each deposited layer becoming the new outer surface of the wafer. The wafer thus formed is typically etched after each layer is deposited so as to form the desired final circuitry features of the integrated circuit onto the wafer. As successive etched layers are built up the final form of the integrated circuit is produced.
One problem that potentially occurs in this process is that as the sequential layers are deposited and etched in this way, the outer surface becomes increasingly non-planar. This in turn causes difficulty as if the outer surface is non-planar then, as a consequence, any further layers placed on the outer layer will also be non-planar. As this reduces the performance of the final integrated circuit a number of approaches have been developed in order to produce planar surfaces as the successive layers are set down.
Chemical/mechanical polishing (CMP) is one of the preferred methods of planarization of substrate surfaces which has been used to alleviate this problem and which has found use in the manufacture of integrated circuits. This method typically requires mounting the substrate (such as the wafer) onto a carrier or polishing head in some way. The exposed surface of the substrate is then placed against a rotating polishing pad which removes excess material from the uneven topography on the surface of the substrate until a substantially flat (planar) surface has been created. The carrier head typically is configured to provide a controllable load pressure onto the substrate to press it evenly against the polishing pad to ensure even polishing across the surface of the substrate. A number of different carrier heads and/or polishing systems have been developed for use in chemical/mechanical polishing processes of this type.
A problem identified in the development of the carrier heads of this type has been the need to design a head that does not damage sensitive substrates such as the silicon wafers during handling. Silicon wafers that are subjected to the process are generally very thin and hence are not ideally suited to being brought into contact with any hard surfaces during movement operations. In addition, even if the surface of the head can be padded in some way there is the risk that the point of contact with the wafer may cause the surface of the wafer to become marked. In order to overcome these difficulties a number of techniques have been used. One technique that has found general application has been the use of flexible membranes that contact the substrate (wafer). In use these are actuated by creating a vacuum behind the membrane forming “suction cups” that contact the wafer and provide a “chucking” effect such that the wafer is held on the membrane. This has been found to effectively hold the wafers so that they can be moved by the head without causing the problems discussed above. In addition by pressurising a chamber behind the membrane, the membrane can force the wafer onto a polishing pad and assist in the polishing process. Accordingly there are a large number of carrier heads that contain flexible membranes in one configuration or another.
For example one suitable carrier head of this type is described in U.S. Pat. No. 6,080,050. This describes a carrier head including a flexible membrane and a compliant backing member for a chemical/mechanical polishing apparatus. The carrier head includes a flexible membrane, the lower surface of which provides a substrate receiving surface. The carrier head includes a compliant backing member with a plurality of cells which contact an upper surface of the flexible membrane to improve vacuum chucking of the substrate onto the head.
In another system, described in U.S. Pat. No. 6,183,354 there is described a carrier head for a chemical/mechanical polishing apparatus which includes a flexible membrane. The carrier head comprises a base, a support structure connected to the base by a flexure, and a flexible membrane connected to the support structure. The flexible membrane has a mounting surface for a substrate and extends beneath the support structure to define a chamber. The chamber may either be evacuated to form suction cups that grip the wafer when it is being moved or be pressurized in order to force the wafer onto the polishing surface during the polishing operation.
In yet another patent, namely U.S. Pat. No. 6,540,594 there is described a carrier head for a chemical/mechanical polishing apparatus comprising a base, a flexible membrane, and a retaining ring surrounding the central portion of the flexible membrane. The flexible membrane has a central portion with a mounting surface for a substrate and a perimeter portion connected to the base, the membrane extending beneath the base to define a chamber. The apparatus also includes a retaining ring surrounding the centre portion of the flexible membrane so as to hold the substrate in position especially when the membrane is pressurized.
Another carrier head that includes a flexible membrane is described in U.S. Pat. No. 6,506,104. This patent describes a carrier head with a flexible member connected to a base to define a first chamber, a second chamber and a third chamber. A lower surface of the flexible member provides a substrate receiving surface with an inner portion associated with the first chamber, a substantially annular middle portion surrounding the inner portion and associated with the second chamber, and a substantially annular portion surrounding the middle portion and associated with the third chamber. The use of a plurality of chambers allows for differential pressure to be applied by the head to different portions of the membrane and hence to the wafer.
As can be seen, there are a number of carrier heads that have been developed which all include flexible membranes in their construction. Indeed the carrier heads described above represent a mere subset of the number of heads that have been described which incorporate a flexible membrane.
One problem typically encountered with the use of a flexible membranes in carrier heads of these types is membrane failure whilst in use. The failure of the membrane cannot be accurately predicted by conventional test procedures which do not damage the membrane. Accordingly it is not possible to test individual membranes prior to use and as such membrane failure typically occurs when in use. With existing membranes the failure rate is approximately 3.5 failures per 10,000 wafer moves. This leads to significant downtime consequences as membrane failure typically leads to the wafer being dropped in the chemical/mechanical polishing apparatus. Whenever this happens it is necessary to rebuild the heads including application of a new membrane, replacement of any damaged tool parts and consumables and recovery of dropped wafers. Due to the high cleanliness required there is also the risk that there may be contamination of the apparatus by any broken pieces of wafer that have occurred due to wafer damage upon falling. Typically, it is found that whenever a wafer drop occurs it takes something of the order of 2 hours to rebuild the head and 4–6 hours to place the apparatus back in full manufacturing mode. As will be appreciated, this leads to significant machine downtime and reduction in the overall sufficiency of the manufacturing process. Accordingly there is a need to develop improved membranes for use in apparatus of this type in order to reduce this downtime. Any reduction in the incidence of membrane failure will directly lead to improved manufacturing efficiencies for machines of this type.
In order to attempt to overcome this problem the current applicants studied membranes and membrane properties at some length in relation to the conditions under which these membranes were forced to operate. It was found that the poor membrane performance typically occurred due to poor selection of physical properties of the membranes used in that the membranes used did not have physical properties that were compatible with the conditions they were required to operate under. Accordingly, there was an unacceptably high rate of failure of the existing membranes during use.
As a result of their studies the applicants have found that functional ability of the membrane was affected by a number of interacting physical parameters. Without wishing to be bound by theory it is felt that insufficient membrane performance is observed when one or more of the membrane's physical properties is not within the required bounds. Unfortunately, the ability to test these physical parameters relies on destructive means and, as such, it is not possible to accurately predict the performance of an individual membrane prior to use by testing its physical parameters.